Preamble 21 to 30.
(21) Support from the Initiative should be used to address market failures or sub-optimal investment situations as a consequence of high capital intensity, high risk, and complex landscape of the semiconductor ecosystem in a proportionate cost-effective manner, and actions should not duplicate or crowd out private financing or distort competition in the internal market. Actions should have a clear added value throughout the Union.
(22) The primary implementation of the Initiative should be entrusted to the Chips Joint Undertaking established by Council Regulation (EU) 2021/2085 (6) (the ‘Chips Joint Undertaking’).
(23) The Initiative should build upon the strong knowledge base and enhance synergies with actions currently supported by the Union and Member States through programmes and actions in research and innovation in semiconductors and in developments of part of the supply chain, in particular Horizon Europe – the Framework Programme for Research and Innovation established by Regulation (EU) 2021/695 of the European Parliament and of the Council (Horizon Europe) and the Digital Europe Programme established by Regulation (EU) 2021/694 of the European Parliament and of the Council with the aim by 2030, to reinforce the Union as global player in semiconductor technology and its applications, with a growing global share in manufacturing, in line with the Commission communication of 9 March 2021 entitled ‘2030 Digital Compass: the European way for the Digital Decade’. Furthermore, private investments are expected to be mobilised to complement the funding of the Initiative contributing to achieving its objectives. Complementing those activities, the Initiative would closely collaborate with other relevant stakeholders, including with the Industrial Alliance on Processors and Semiconductor Technologies.
(24) In order to allow synergies between the Union and Member States’ programmes, the work programmes of the Chips Joint Undertaking under the Initiative should in accordance with Article 17(2), point (k), and Article 137, point (aa), of Regulation (EU) 2021/2085 clearly differentiate actions to support research and innovation in semiconductors from those aiming to develop parts of the supply chain, so as to ensure the appropriate participation of public and private entities.
(25) With a view to facilitating the implementation of specific actions supported by the Initiative, such as the virtual design platform or pilot lines, it is necessary to provide as an option a new legal instrument, the European chips infrastructure consortium (ECIC). The ECIC should have legal personality.
This means that when applying for specific actions to be funded by the Initiative, the ECIC itself, and not individual entities forming the ECIC, can be the applicant. Nevertheless, pursuant to Article 134(3) of Regulation (EU) 2021/2085, the work programme calls for proposals under the Initiative are open to different legal forms of cooperation and other participants, and the selection of proposals for funding is not based on a specific legal form of cooperation.
The main aim of the ECIC should be to encourage effective and structural collaboration between legal entities, including research and technology organisations, industry and Member States. The ECIC should involve the participation of at least three members, namely Member States, or public or private legal entities from at least three Member States, or a combination thereof, with a view to achieving broad representation across the Union. By having legal personality, an ECIC would have sufficient autonomy to lay down its membership, governance, funding, budget, the arrangements for financial and in-kind contributions from its members, and coordination, management of IP and working methods.
The members of the ECIC should be able to have full flexibility in determining the applicable law, statutory seat and voting rights. The selection of public and private legal entities implementing the work plan of the ECIC should be fair, transparent and open. To ensure fair and equal access to participation, an ECIC should be open to new members, namely Member States or public or private legal entities, over its lifetime.
Member States in particular should be able to join an ECIC at any time either as full members or observers, whereas other public or private legal entities should be able to join at any time on fair and reasonable terms specified in the statutes of the ECIC. The Public Authorities Board of the Chips Joint Undertaking should be able to verify the openness of an ECIC and recommend for certain remedial measures to be taken where necessary.
The establishment of an ECIC should not involve the actual establishment of a new Union body. It should address the gap in the Union’s toolbox to combine funding from Member States, the Union budget and private investment for the purpose of implementing specific actions supported by the Initiative. The Commission should not be a member of the ECIC.
(26) An ECIC whose membership does not include private entities is to be recognised as an international body within the meaning of Article 143(1), point (g), and Article 151(1), point (b), of Council Directive 2006/112/EC and as an international organisation within the meaning of Article 11(1), point (b), of Council Directive (EU) 2020/262 (10). An ECIC which includes private entities among its members should not be recognised as such an international body or such an international organisation.
(27) R & D within the Union is increasingly exposed to practices aiming to misappropriate confidential information, trade secrets, and protected data, such as IP theft, forced technology transfers and economic espionage. In order to prevent adverse impacts on the interests of the Union and the objectives of the Initiative, it is necessary to adopt an approach to ensure that the access to and use of sensitive information or results, including data and know-how, security and transfer of ownership of results as well as content protected by IP rights generated in connection to or as a result of actions supported by the Initiative, are protected.
To ensure that protection, any actions supported by the Initiative and funded by Horizon Europe and the Digital Europe Programme should follow the relevant provisions of those Programmes, such as on participation of entities established in third countries associated with the programme, grant agreements, ownership and protection, security, exploitation and dissemination, transfer and licensing and access rights.
It is possible to set specific provisions when implementing those Programmes, in particular with regard to limitations to transfers and licensing in accordance with Article 40(4) of Regulation (EU) 2021/695, and limitation of participation of legal entities established in specified associated or other third countries due to reasons based on the Union’s and the Member States’ strategic assets, interests, autonomy or security, in accordance with Article 22(5) of Regulation (EU) 2021/695 and Article 12(6) of Regulation (EU) 2021/694.
Additionally, the handling of sensitive information, security, confidentiality, protection of trade secrets and IP rights should be governed by Union law, including Directives (EU) 2016/943 and 2004/48/EC of the European Parliament and of the Council, and national law. It is possible for the Commission and the Member States to protect technology transfers for reasons related to Union and national security interests in relation to investments made in facilities falling within the scope of this Regulation in accordance with Regulation (EU) 2019/452 of the European Parliament and of the Council.
(28) To facilitate access to technical expertise and ensure dissemination of knowledge across the Union, as well as support to diverse skills initiatives, a network of competence centres should be established. To that end, the Chips Joint Undertaking should establish the procedure for establishing competence centres, including the selection criteria, as well as further details on the implementation of the tasks and functions mentioned in this Regulation. The competence centres forming the network should be selected by the Chips Joint Undertaking and should have substantial overall autonomy to lay down their organisation, composition and working methods. However, their organisation, composition and working methods should comply with and contribute to the objectives of this Regulation and the Initiative.
(29) Competence centres should contribute to maintaining the Union’s lead with regard to chip research, development and innovation and design capabilities by focusing on the promotion of research, development, innovation and design, together with a focus on manufacturing. The promotion of human potential and skills through education in science, technology, engineering and mathematics (STEM) subjects up to the postdoctoral level is crucial for achieving that objective.
In particular, competence centres should provide services to the semiconductor stakeholders, including start-ups and SMEs. Examples include facilitating access to pilot lines and to the virtual design platform, providing training and skills development, support to finding investors, making use of existing local competencies or reaching out to the relevant verticals. The services should be provided on an open, transparent and non-discriminatory basis.
Each competence centre should connect and be part of the European network of competence centres in semiconductors and should act as an access point to other nodes of the network. In this regard, synergies with existing similar structures, such as European Digital Innovation Hubs established under the Digital Europe Programme, should be maximised. For example, Member States could designate an existing European Digital Innovation Hub focused on semiconductors as a competence centre for the purposes of this Regulation, provided that the prohibition of double financing is not breached.
(30) Chip design is a crucial capability for implementing any innovation and functionality into electronic solutions adapted to different applications and the needs of users of semiconductors. As such, design is at the heart of the semiconductor value chain and supporting the expansion of design capabilities in the Union is of critical importance.
To recognise the key role of design centres and their contribution to European excellence in advanced chip design through service offerings or strengthening of design skills and capabilities in the Union, the Commission should be able to award a label for ‘design centre of excellence’. In light of their importance for enabling a resilient semiconductor ecosystem, the design centres of excellence should be considered to be in the public interest.
To contribute to the resilience of the Union’s semiconductor ecosystem, Member States should be able to apply support measures, in a proportional manner, if such design centres of excellence are SMEs. This is without prejudice to the competence of the Commission in the field of State aid under Articles 107 and 108 TFEU, where relevant, and to the Commission communication of 19 October 2022 entitled ‘Framework for State aid for research and development and innovation’ (the ‘R & D&I State aid framework’).
The R & D&I State aid framework aims to facilitate research, development and innovation activities which, due to market failures, would not occur in the absence of public support. In this respect, on the basis of the R & D&I State aid framework, Member States, subject to certain conditions, could provide the necessary incentives to companies and the research community to carry out these important activities and investments in this field.
Under the R & D&I State aid framework, maximum aid intensities up to the level of 80 % could be allowed for aid for R & D projects of medium-sized enterprises and up to 90 % could be allowed for those of small enterprises. Furthermore, in order to maximise synergies, competence centres established under the Initiative that focus on state-of-the-art chip design should be able to apply to receive the label of ‘design centre of excellence’. At the same time, Member States could designate a design centre of excellence as their candidate competence centre.